Field effect transistors (FETs) are widely used in the electronics industry for switching, amplification, filtering, and other tasks related to both analog and digital electrical signals. Most common among these are metal-oxide-semiconductor field-effect transistors (MOSFETs), wherein a gate electrode is energized to create an electric field in a channel region of a semiconductor body, by which electrons are allowed to travel through the channel between a source region and a drain region of the semiconductor body. The source and drain regions are typically formed by adding dopants to targeted regions on either side of the channel. A gate dielectric or gate oxide is formed over the channel, and a gate electrode or gate contact is formed over the gate dielectric. The gate dielectric and gate electrode layers are then patterned to form a gate structure overlying the channel region of the substrate.
In operation of the resulting MOS transistor, the threshold voltage (Vt) is the gate voltage value required to render the channel conductive by formation of an inversion layer at the surface of the semiconductor channel. The threshold voltage is dependent upon, among other things, the workfunction difference between the gate and the substrate materials. In various circuit designs, it is desirable to have transistors with different threshold voltages within the same IC (integrated circuit) chip.
The workfunction of a material is a measure of the energy required to move an electron in the material outside of a material atom from the Fermi level, and is usually expressed in electron volts (eV). For CMOS products, it is desirable to provide predictable, repeatable, and stable threshold voltages (Vt) for the NMOS and PMOS transistors. To establish Vt values, the workfunctions of the PMOS and NMOS gate contact and the corresponding channel materials are independently tuned or adjusted through gate and channel engineering, respectively.
The use of different workfunction metals may be used to tune threshold voltages. However, this technique often requires additional mask levels, resulting in higher complexity and cost for fabrication. Furthermore, residual work function metals on respective devices may cause unacceptable levels of yield and device variability. Therefore, it is desirable to have an improved method and structure for achieving multiple threshold voltages within a chip.